About this role
About the Role Marvell is seeking a Technical Lead for IC Design to drive the micro-architecture of SoCs and lead cross-functional collaboration across architecture, floor planning, backend, verification, DFT/STA, and software teams to deliver world-class hardware for datacenter and AI workloads. What You'll Do
- Define the micro-architecture of SoCs, including blocks, cores, accelerators, and subsystems.
- Work closely with architecture, floor planning, backend, verification, DFT, STA teams, and other cross-functional teams to produce high-quality hardware.
- Develop and write micro-architectural specifications of the design.
- Implement designs using good RTL coding and low power techniques.
- Collaborate with the backend team to close on synthesis, place and route, and timing signoff.
- Collaborate with the verification team on pre-silicon verification tasks such as reviewing test plans, coverage closure, and full-chip simulation debug.
- Plan, scope, and time tasks with the project manager.
- Work with post post-silicon group to resolve any lab issues and successfully bring up silicon.
- Collaborate with the software team to ensure customer use cases requirements are met. What We're Looking For
- Bachelor’s degree in computer science, Electrical Engineering, or related fields, and 12+ years of related professional experience. Or a Master’s degree in computer science, Electrical Engineering, or related fields with 10+ years of experience. Or a PhD in Computer Science, Electrical Engineering, or related fields with 8+ years of experience.
- Fluent in SystemVerilog RTL coding techniques.
- Familiar with modern SoC architectures and interface technologies such as AXI, HBM, Ethernet, PCIe, and D2D.
- Experience in micro-architecture of complex custom/ASIC products, focusing in one or more of the following areas: NPU, embedded processors, DSP, graphics, and general-purpose microprocessors.
- RTL design experience, synthesis, static-timing closure, formal verification, gate-level simulations, and block-level functional verification.
- Experience in implementation/timing closure for high-speed design.
- Hands-on experience for all aspects of the chip-development process, with proficiency in front-end design tools and methodologies, is a plus.
- Experience in designing high-speed (>1 GHz)/high-performance embedded processor SOC products is a plus.
- Knowledge of scripting languages such as Python, Perl, Tcl, and UNIX shell is desirable. Nice to Have
- Front-end design tools proficiency is a plus.
- Experience in high-speed (>1 GHz) embedded processor SOC products is a plus.
- Scripting in Python, Perl, Tcl, or UNIX shell is desirable. Compensation & Benefits
- Salary range: USD 182,360 - 273,200 per year.
- Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources, and a recognition and service awards to celebrate contributions and milestones.