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Staff Firmware/Software Engineer- Embedded SoC/Microcontroller/DSP/SERDES/AEC/Microled/ODSP/PHY/AI Connectivity

Marvell
Santa Clara, CA
On-siteUSD 111,070 - 166,400 / year

About this role

Job title: Staff Firmware/Software Engineer- Embedded SoC/Microcontroller/DSP/SERDES/AEC/Microled/ODSP/PHY/AI Connectivity

About the Role The Optical Digital Signal Processing (ODSP) PHY SW Team develops software for Marvell's DSP products used in pluggable optical modules—chips that form the backbone of the internet. The Staff Firmware/Software Engineer role combines technical leadership with project coordination to drive embedded firmware and software from design to production.

What You'll Do

  • Architecture, design, development, and testing of embedded C firmware for controlling our DSP HW on a RISC-V multi-core MCU.
  • Drive firmware development for DSP control blocks, including RX/TX signal processing, FEC, PLL/FLL, reference generation, and thermal monitoring.
  • Technical reviews of firmware architecture, API design, and system integration; translate complex specifications into clear requirements and sequence diagrams.
  • Debug issues with HW/Systems teams and coordinate with test/validation/customer support.
  • Plan SW milestones, develop in sprints, close tickets, and roll out features; coordinate with Marketing, AE, Test, Validation, SW_QA, and Hardware to align on deliverables and schedules.
  • Provide regular status updates on milestones, scope, dependencies, and blockers; manage Agile sprint planning and backlog prioritization.
  • Engage with Tier-1 customers on feature requirements, API specs, and implementation; support bring-up and field issue resolution; deliver customer-specific features (e.g., FEC burst stats, VDM telemetry, CMIS).

What We're Looking For

  • Minimum Requirements: memory-constrained embedded C/C++ firmware development; architecture design, code reviews, and testing through to customer volume production; understanding of embedded SoC/microcontroller architecture (RISC-V a plus), memory-mapped hardware interfaces, GPIOs, ISRs; excellent verbal and written communication in English.

Nice to Have

  • Experience with SERDES, IM-DD/Coherent DSP, Ethernet/PCIe PHYs, and/or Optical Module SW.
  • Designing/developing/debugging software state machines, transitions, context saving, and error handling.
  • Mixed-signal (analog+digital) control and monitoring; PID/feedback loop control.
  • Bare-metal, RTOS, device drivers, Linux kernel.
  • Familiarity with advanced compiler options and details (clang/gcc).
  • Proficient in C and Python; knowledge of git, Linux, Makefiles, gdb, IDEs, bash.
  • Verilog, FPGA emulation; lab equipment such as oscilloscopes, PNAs, ONTs.
  • Understanding of Ethernet networking from OSI model up to the PHY; FEC, PCS framing, PMA/PMD, PRBS; signal processing concepts (BER, SNR, FFT).
  • BS/MS/PhD in CS or Electrical/Software Engineering or related field.

Compensation & Benefits

  • Base pay range: USD 111,070 - 166,400 per year. This may be modified based on market conditions.
  • Benefits include employee stock purchase plan with a 2-year look-back; family support programs; mental and physical health benefits; and recognition programs.

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