Staff Digital Design Engineer

About the Role Join Marvell's Custom Compute Solutions Business Unit (CCSBU) as we establish our design presence in San Diego's thriving semiconductor ecosystem. This team will deliver high-quality customer silicon for advanced AI, XPU, and XPU-Attach programs, partnering with customers and internal stakeholders to enable Marvell’s most strategic and financially significant custom SoC initiatives. This is a rare opportunity to help build a new design center and shape the culture and technical DNA of Marvell's San Diego team.

What You'll Do

• Design, develop, implement, verify, and document micro-architecture and RTL for complex power management integrated circuits.
• Participate in the design development cycle, from RTL coding and timing specifications, close collaboration with design verification teams to review test plans and execute tests, bring up block tests on silicon during lab testing, and maintain designed blocks and reusable IPs.
• Schedule detailed reviews with cross-functional teams.
• Evaluate and participate in improving design and verification methodologies.

What We're Looking For

• Bachelor's degree in Computer Science, Electrical Engineering, or related fields and 3-5+ years of related professional experience; or Master's/PhD with 2-3+ years of experience.
• Experience with SystemVerilog RTL coding techniques.
• Experience in high-speed, multiple clock domain designs.
• Familiar with modern SoC architectures and interface technologies such as AXI, DDR, Ethernet, PCIe.
• Experience in micro-architecture of complex custom/ASIC products involving chip I/O, shared memory, and embedded processors.
• RTL design experience, including synthesis, static-timing closure, formal verification, gate-level simulations, and block-level functional verification.
• Ability to come up with creative and innovative solutions and demonstrate technical leadership within a team.
• Excellent verbal and written communication.
• Discipline and rigor in documentation.
• Ability to work efficiently and influence with team members across multiple sites.
• Enthusiastic about exploring and applying new methods, tools, and process efficiency to ASIC design flow.
• Knowledge of scripting languages such as Python, Perl, Tcl, and UNIX shell is desirable.

Compensation & Benefits

• Salary: USD 115,200 - 170,390 per year.
• Benefits include employee stock purchase plan with a 2-year look-back, family support programs, robust mental health resources, and recognition and service awards.