About this role
About the Role Synopsys is seeking a Staff Applications Engineer - Verification to collaborate with customers, resolve verification challenges, and enable fast, high-quality tapeouts using the Synopsys Verification Platform. The role blends deep verification expertise with customer success, requiring strong communication and hands-on debugging across SystemVerilog/Verilog and related methodologies.
What You'll Do
- Collaborate with customers to understand their verification challenges and provide tailored technical solutions using Synopsys Verification Platform.
- Support customer projects throughout their tapeout schedules, ensuring timely resolution of technical issues and successful project outcomes.
- Deliver technical presentations, workshops, and training sessions on Synopsys EDA tools, methodologies, and best practices.
- Assist customers in dynamic simulation, debug, low power verification, and coverage analysis using SystemVerilog, Verilog, and related methodologies.
- Develop and share technical documentation, application notes, and knowledge resources to empower customer success and internal teams.
- Interface with R&D and product teams to communicate customer feedback and contribute to product enhancements and new feature development.
- Maintain up-to-date knowledge of industry trends, verification technologies, and Synopsys solutions to stay ahead of the curve.