Sr. Staff Engineer-High Speed Interface Pre-Silicon Validation/Verification

Job title: Sr. Staff Engineer-High Speed Interface Pre-Silicon Validation/Verification

About the Role Synopsys seeks a Sr. Staff Engineer focused on High Speed Interface Pre-Silicon Validation/Verification. The role spans bridging Emulation IP with Design IP verification for Controller and PHY domains, delivering robust, production-ready IP and accelerating verification cycles in a highly collaborative, matrixed, and international environment.

What You'll Do

• Bridging and closing gaps between the available or required Emulation IP feature set and the Design IP verification for all functions, spanning both Controller and PHY domains.
• Reporting key metrics and driving continuous improvement initiatives in Emulation IP quality and performance.
• Providing technical leadership and expertise to define requirements for Emulation IP, ensuring its correct implementation and deployment within verification strategies.
• Staying ahead of evolving industry standards, interpreting future changes, ECNs, and specification errata, and integrating this knowledge into Emulation and Design IP teams.
• Reviewing and validating test plans for both Emulation IP and Design IP, guaranteeing best-in-class function, feature coverage, and product quality.
• Collaborating cross-functionally to optimize workflows, standardize methodologies, and ensure compliance with organizational goals.
• Mentoring and guiding junior engineers, fostering a culture of innovation and continuous improvement.

What We're Looking For

• You are a driven and insightful Emulation Expert, passionate about pushing the boundaries of what's possible in ASIC digital design.
• Deep understanding of IP interfaces--especially PCIe and DDR.
• Skilled in leveraging advanced emulation platforms like Zebu to accelerate verification and product development.
• Proven ability to deliver robust, production-ready IP through rigorous emulation and verification cycles.
• Thrives in highly collaborative, matrixed, and international environments, bringing together diverse teams and perspectives.
• Hands-on approach and proactive attitude, bridging gaps between Emulation IP and Design IP for Controller and PHY components.
• Keen eye for detail, right-first-time development, traceability and completeness across verification requirements.
• Stays ahead of industry trends, standards, evolving technologies, and translates into actionable insights for teams.
• Excellent communicator and natural collaborator, comfortable with multiple stakeholders and driving change.
• Adaptability, resilience, and commitment to continuous learning as a leader in the field.