About this role
Sr. SOC Engineer
Job Description ADVANCE YOUR CAREER. ADVANCE THE WORLD.
At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.
Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career.
THE ROLE: Join AMD's SOC design team and take technical ownership of the design and integration efforts that bring some of the industry's most advanced silicon to life. You'll work at the heart of the chip—integrating AMD and third-party IP, shaping SOC and IP feature enhancements, and driving decisions that influence top-level latency and performance.
You'll guide a key area of the design while partnering closely with IP development, verification, front-end integration, and physical design teams. If you thrive on solving hard problems, seeing your work span from RTL to full-chip construction, and collaborating with talented engineers across the stack, this is where you'll do the best work of your career.
THE PERSON: You're a self-driven engineer with the initiative to own problems from start to finish. You bring excellent written and verbal communication skills, along with strong analytical and problem-solving abilities that help you navigate complex, cross-functional challenges.
KEY RESPONSIBILITIES
- Drive SOC-level design and integration
- Integrate IP, SOC-level fabric, voltage and clock crossings, clocks, resets, fuses, and I/O
- Develop RTL design and coding for various sections of the SOC and related logic
- Own SOC power design
- Perform static verification of the design (RTL, CDC, Power, Connectivity)
- Lead one of the domains listed above
PREFERRED EXPERIENCE:
- Verilog RTL development with industry tools in a CPU, SOC, or ASIC environment
- SOC integration and architecture understanding
- System bus protocol knowledge (e.g., AXI, PCIe)
- Power implementation methodology and UPF
- Static timing analysis
- Collaboration with physical design teams and awareness of physical design requirements
- Formal verification techniques and tools
- Scripting skills (Ruby, Perl, Shell, TCL) a plus
ACADEMIC CREDENTIALS:
- BE/B.Tech/ME/M.Tech or equivalent in ECE/EEE
- Background in SOC design and Verilog RTL development preferred