Sr. Principal Engineer, RTL ASIC Design

Job title: Sr. Principal Engineer, RTL ASIC Design

About the Role Sr. Principal Engineer, RTL ASIC Design will define SoC architecture, micro-architecture, and register specification for highly complex SoCs. You will work closely with system and chip architects, IP vendors, and customers to implement and verify industrial-quality RTL designs and drive front-end and back-end integration.

What You'll Do

• Define the SoC, sub-system architecture, micro-architecture and register specification for highly complex SoCs. Drive and participate in specification writeup.
• Work closely with system and chip architects to design industrial quality implementations.
• Conduct detailed performance, architectural and design requirement reviews with cross-functional teams, IP Vendors and customers.
• Implement a specification using RTL coding techniques and best practices.
• Work with third party vendors to define customization requirements of third party IPs (controller, PHY, etc.)
• Work with the physical design teams, reviewing and providing guidance in floorplanning, power analysis, synthesis and timing signoff.
• Work with the verification team on pre-silicon verification tasks such as reviewing the verification test plans, coverage analysis, full-chip simulation and emulation, performance and power analysis and debug.
• Help develop and/or evaluate design and verification methodology.

What We're Looking For

• Bachelor's/Master's degree in Computer Science, Electrical Engineering or related fields and 18+ years of related professional experience. PhD in Computer Science, Electrical Engineering or related fields with 16+ years of experience.
• Architect and design SoC, subsystems (reset, boot, power, security, access control, debug, CPU, DSP, AI accelerators).
• Define specifications, microarchitecture, and use cases with cross-functional teams.
• Collaborate with hardware, firmware, and security teams to ensure design efficiency.
• Perform trade-off analysis (area, power, performance, security, HW/SW reusability).
• Work on high-speed interconnects (PCIe, CXL, DDR) and system caches.
• Strong experience in SoC architecture, HW microarchitecture, and security.
• Expertise in ARM-based SoC architectures, including compute, memory management, and virtualization.
• Knowledge of high/low-speed peripherals, DDR, interconnects, QoS, and power management.
• Experience in performance analysis, simulation, modeling, and VLSI design flow.
• Proficiency in HDL, scripting, and digital design.
• Strong communication and collaboration skills for global teams.

Compensation & Benefits

• With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity.
• We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us.
• For additional information on what it’s like to work at Marvell, visit our Careers page.