About this role
Job title: SOC Physical Design Static Timing Analysis Engineer
About the Role
As a Physical Design Timing Engineer, you will play a pivotal role in shaping the performance, power efficiency, and functionality of Intel's cutting-edge System-on-Chip (SoC) designs. Your expertise will directly impact product quality, enabling groundbreaking advancements in technology that drive computing innovation. Collaborating across multiple teams, you will contribute to the creation and optimization of high-performance, low-power solutions while developing methodologies that enhance efficiency.
What You'll Do
- Collaborate across multiple teams to create and optimize high-performance, low-power SoC designs.
- Develop and apply timing analysis methodologies to drive performance, efficiency, and reliability in physical designs.
- Contribute to overall product quality by ensuring robust timing closure for complex SoCs.
What We're Looking For
- Experience in physical design timing analysis and SOC timing closure.
- Ability to collaborate across cross-functional teams.
- Strong focus on high-performance, low-power design solutions.