Senior Staff Validation Engineer

Job title: Senior Staff Validation Engineer

About the Role Marvell is seeking a Senior Staff Validation Engineer in the Custom Compute and Storage Business Group to validate Ethernet, PCIe and other high-speed interfaces in post-silicon environments. The role encompasses the full development cycle of SerDes from IP stage to productization, including circuitries, DSP algorithms, and initialization for electrical performance and compliance. You will own high-speed SerDes validation and work across cross-functional teams to ensure quality and reliability of state-of-the-art silicon.

What You'll Do

• As a high speed SerDes validation Engineer, you will focus on the validation of Ethernet/PCIe/Die-to-Die interface as well as supporting the debug and functional tests of the PHY. You’ll have an opportunity to work on the latest Ethernet 224G, PCIe Gen6/7 technology and product development, along with other advanced high-speed SerDes.
• Complete ownership of high speed SerDes validation in post-silicon environment.
• Document, execute and report overall PHY validation for Marvell custom silicon devices.
• Perform lab-based silicon bring-up and SerDes engineering focused on Ethernet/PCIe/D2D Physical layer functionality.
• Participate in collaborative discussions to drive resolution for technical issues.
• Troubleshoot failing tests with diagnostics, hardware analyzers and software tools.
• Work with cross-functional teams to debug any post-silicon and/or customer issues related to SerDes PHY.

What We're Looking For

• Bachelor’s degree in Electrical Engineering or related fields and 5-7 years of related professional experience OR Master’s degree in Electrical Engineering or related fields with 3-5 years of experience.
• 3+ years of experience with high-speed IO testing, debugging and validation
• In depth working knowledge of test equipment used for SERDES characterization (Scope, BERT, Network analyzer etc.).
• Strong understanding of high-speed SerDes, equalization technique and SerDes links and channels.
• Working knowledge of Ethernet/PCIe interface and characterization.
• Experience with Python, or other programming language.
• Critical thinking and problem-solving attitude and ownership of the group’s results.
• Excellent verbal and written communication skills.
• Knowledge of the physical and protocol levels (PIPE I/F, PCS, MAC) of one or more common high-speed interfaces is an asset.
• Knowledge of board design, board schematics and board layout, and signal integrity is a plus.

Nice to Have

• Knowledge of the physical and protocol levels (PIPE I/F, PCS, MAC) of one or more common high-speed interfaces is an asset.
• Knowledge of board design, board schematics and board layout, and signal integrity is a plus.

Compensation & Benefits

• Salary range: USD 143,400 - 212,230 per year.
• Employee stock purchase plan with a 2-year look back.
• Family support programs to help balance work and home life.
• Robust mental health resources to prioritize emotional well-being.
• Recognition and service awards to celebrate contributions and milestones.