About this role
Marvell is seeking a Senior Staff Firmware Engineer in Santa Clara, CA. You will join the Ethernet PHY group and contribute to firmware for an embedded processor in a high-performance PAM4 encoding communication transceiver. The role focuses on developing portable C software for embedded firmware and host-based utilities, and participating in the full software development lifecycle. The position offers a base pay range of $131,010 to $196,300 per year and eligibility for bonus and equity plans.
Responsibilities
- Develop and debug portable C software for embedded firmware and for C/Python-based host utilities and regression/simulation infrastructure.
- Structure new feature designs and code changes to be scalable, maintainable, and easily mergeable.
- Participate in the software development design flow, including code reviews, issue-tracking (Jira), and adherence to team design and coding guidelines.
- Conduct cross-vendor interoperability testing and debugging.
- Identify, troubleshoot, and resolve issues to maintain standards compliance.
- Create utilities to aid embedded software development, debugging, evaluation, and diagnostics.
- Develop test infrastructure, test data analysis tools, and maintain test scripts.
Requirements
- BS or MS degree in CS/CE/EE (MS preferred) with 4+ years of experience.
- Strong C and Python programming, debugging, and testing skills.
- Knowledge of embedded microprocessors (ARM Cortex).
- Experience with Git and build/release procedures.
- Ability to follow established coding guidelines and practices.
- Strong verbal and written communication skills.
- Preferred: proficiency with state machines to architect and write well-structured C code for embedded processors; experience with embedded firmware for DSP systems; boot loader design and RTOS implementation; experience across the full embedded firmware development lifecycle; hardware troubleshooting with oscilloscopes, ICE, spectrum analyzers, and network analyzers; Python-based GUI development; Ethernet protocol and PHY device experience; Verilog is a plus.