About this role
About the Role Marvell seeks a Senior Staff Engineer for Hardware & Silicon Validation in Ho Chi Minh to own end-to-end post-silicon validation for Connectivity products. You will drive silicon bring-up through mass production readiness and collaborate with design, DSP, firmware, qualification, AE, and FA teams to resolve issues and meet program milestones.
What You'll Do
- Plan, set up, and execute post-silicon validation across Functionality, Performance, Compliance, Robustness, Interoperability, Power, and PVT validation across product milestones.
- Validate high-speed SerDes and DSP-based connectivity products, including characterization of FLL/PLL, TX/RX signal quality, AVS, FEC, BER margin, and link behavior across PVT corners.
- Perform interoperability and compliance validation for high-speed interfaces (PAM4 optical, AEC copper, PCIe/CXL) following applicable industry standards (IEEE 802.3, OIF CEI, PCI-SIG).
- Drive silicon bring-up, chip screening, and engineering sample validation on EVB platforms; work closely with hardware design and firmware teams during the early bring-up phase.
- Develop and maintain automated test scripts, validation frameworks, and regression flows (Python/Jenkins) to improve test coverage, reduce validation cycle time, and enable continuous firmware quality monitoring.
- Collaborate cross-functionally with Digital Design, DSP, Analog, Firmware, Qualification, AE, and FA teams globally to investigate and resolve silicon issues and drive program milestones.
- Author validation plans, test reports, and application collaterals; maintain issue trackers and archive results in the centralized engineering database.
- At senior levels: lead a validation domain or product program, mentor junior engineers, define methodology and best practices, drive cross-site alignment, and contribute to team capability planning.
What We're Looking For
- BSEE/MSEE or equivalent degree in Electrical Engineering, Electronics & Telecommunications, Computer Engineering, or a related field; 5+ years for Staff, 8+ years for Senior Staff.
- Hands-on experience in post-silicon validation, silicon characterization, or high-speed system-level testing of semiconductor products.
- Solid understanding of high-speed SerDes interfaces (PAM4/NRZ) and key performance parameters such as BER, eye margin, jitter, TX/RX compliance, link equalization, and signal integrity fundamentals.
- Experience with PAM4 optical (IEEE 802.3), Active Electrical Cable (OIF CEI), PCIe Gen5/Gen6/Gen7, CXL, or equivalent high-speed interconnect technologies.
- Proficiency in test automation using Python and/or Bash; experience with automated lab equipment control is strongly preferred.
- Working knowledge of lab instruments including Oscilloscopes, BERTs, Signal/Spectrum Analyzers, DCA sampling scopes, Thermal Stream controllers, and related equipment.
- Understanding of signal integrity on high-speed PCB systems and experience with EVB bring-up and debug.
- Effective communication and presentation skills; comfortable working with international cross-functional teams across multiple time zones.
- Experience with MATLAB, ADS, or similar simulation/analysis tools is a plus.
- Experience in electro-optical systems, analog circuit characterization, or DSP-based transceiver products is a plus.
Nice to Have
- Familiarity with MATLAB/ADS or similar tools is a plus.
- Experience in electro-optical systems or DSP-based transceivers is a plus.
Compensation & Benefits
- With competitive compensation and great benefits, you will enjoy our work style within an environment of shared collaboration, transparency, and inclusivity. We provide the tools and resources you need to succeed and grow with us. For additional information on what it’s like to work at Marvell, visit our Careers page.
- All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
- Interview Integrity: To support fair and authentic hiring practices, candidates are not permitted to use AI tools during interviews.