About this role
About the Role Marvell seeks a Senior Staff Design Engineer to contribute to the design of high-speed digital IPs for data storage, including customer computing IPs, signal processing IPs, and NAND flash controller IPs. This role involves hands-on RTL design and end-to-end ownership from development to silicon debugging.
What You'll Do
- Responsible for design, development, modification, evaluation, verification and debugging of high-speed digital design for customer computing IPs, signal processing IPs, NAND flash controller IPs.
- Principal duties include RTL design, verification, synthesis, timing optimization, static timing check, CDC check, Lint check, power analysis, design review, silicon debugging, design documentation and support user specification.
What We're Looking For
- Have a Bachelor’s or Master’s in Electrical Engineering, Computer Engineering, Computer Science, or similar field with 10+ years of experience on digital IC design.
- Experience on RTL design using System Verilog, timing closure, power analysis, CDC check.
- Excellent team player.
- Excellent problem solver.
- Sense of ownership for assigned sub-system and task.
- Architecture level thinking.
Compensation & Benefits
- Salary range: USD 134,390 - 201,300 per year.
- Employee stock purchase plan with a 2-year look back
- Family support programs to help balance work and home life
- Robust mental health resources to prioritize emotional well-being
- Recognition and service awards to celebrate contributions and milestones
- Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage.