About this role
Senior Principal Engineering Program Manager
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.
Role Overview
Astera Labs is looking for a Senior Principal Engineering Program Manager to lead end-to-end execution of advanced-node ASIC products from concept through production. This is a high-visibility role with direct accountability for delivering revenue-critical silicon on time, on spec, and at scale.
Key Responsibilities
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Program Ownership & Execution
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Own full ASIC lifecycle execution: architecture, RTL, verification, physical design, tapeout, validation, customer sampling, qualification, and RTM
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Serve as the single point of ownership for assigned ASIC programs
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Drive program planning, schedules, budgets, resources, and risk management
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Cross-Functional Leadership & Issue Resolution
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Lead cross-functional teams across design, validation, product, test, firmware, software, and operations
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Resolve complex pre-silicon and post-silicon issues through strong technical judgment
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Stakeholder Management & Alignment
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Manage scope, schedule, and cost trade-offs and communicate clearly with executives and stakeholders
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Champion program execution while aligning engineering delivery with business and customer goals
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Basic Qualifications
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BS or MS in Electrical, Electronics, or Computer Engineering
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10+ years of ASIC product development experience in a semiconductor environment
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Strong understanding of ASIC development flows, with hands-on experience in RTL, DSP, or Physical Design
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Experience delivering ASICs in advanced nodes (