Senior Principal Embedded Firmware Software Engineer - Networking PAM4 DSP/data center/ODSP/AEC/Microled/AI connectivity

Job title: Senior Principal Embedded Firmware Software Engineer - Networking PAM4 DSP/data center/ODSP/AEC/Microled/AI connectivity

About the Role The Optical Digital Signal Processing (ODSP) PHY SW Team at Marvell develops firmware for DSP-based optical modules used in data centers. This Senior Principal role combines technical leadership with cross-functional program management to bring complex DSP hardware and software to production. You will guide a small embedded software team and own firmware architecture across the lifecycle from pre-silicon simulation to field deployment.

What You'll Do

• Lead the Architecture, Design, Development, and Testing of embedded C firmware for controlling our DSP hardware.
• Serve as the technical lead on a product, guiding SW team members (2-8 developers) through the development process.
• Drive firmware development for DSP control blocks, including RX/TX signal processing, FEC, PLL/FLL, reference generation, and thermal monitoring.
• Lead technical reviews of firmware architecture, API design, and system integration approaches.
• Translate complex specifications from standards bodies (MSA/OIF/CMIS) or directly from customers into easy-to-digest requirements, and clear sequence diagrams to aid in development.
• Take lead on difficult to debug issues, drive to root causes with HW/Systems teams, and follow up with test/validation/customer support teams.
• Work with cross-functional teams to plan SW milestones, develop in sprints, close tickets, and roll out features for the product.
• Coordinate with Marketing, AE, Test, Validation, SW_QA, and Hardware teams to align on deliverables and schedules.
• Provide regular status updates on milestones, scope, dependencies, and blockers.
• Manage Agile sprint planning and backlog prioritization in collaboration with stakeholders.
• Lead technical discussions with tier-1 customers on feature requirements, API specifications, and implementation.
• Support customer bring-up activities and resolve field issues.
• Work with AE teams to understand customer expectations and deliver critical features.
• Handle customer-specific feature development such as FEC burst statistics, VDM telemetry, and CMIS compliance.

What We're Looking For

• Minimum Requirements:
• Experience in memory-constrained embedded C/C++ FW development.
• SW Team Lead or Technical Lead experience on embedded projects.
• Architecture design & development, code reviews & testing, through to customer volume production.
• Understanding of embedded SoC, microcontroller architecture (RISC-V a plus), memory-mapped hardware interfaces, GPIOs, ISRs, etc.
• Excellent verbal and written communication skills in English, and able to collaborate in a large cross-functional organization.
• Excellent problem-solving and customer debug skills on real hardware in the lab.
• Experience with using revision control and defect tracking systems.
• Preferred but not required:
• Experience with SERDES, IM-DD/Coherent DSP, Ethernet/PCIe PHYs, and/or Optical Module SW.
• Experience with designing/developing/debugging software state machines, transitions, context saving, and error handling.
• Experience with mixed-signal (analog+digital) control and monitoring, PID/feedback loop control.
• Experience with bare-metal, RTOS, device drivers, Linux kernel, etc.
• Familiarity with advanced compiler options and details (clang/gcc preferred).
• Proficient in C and Python, with knowledge of git, Linux, makefiles, gdb, IDEs, bash.
• Familiarity with digital verification test flows, FPGA emulation, hardware languages such as Verilog.
• Familiarity with lab equipment such as oscilloscopes, supplies, PNAs, ONTs.
• Understanding of Ethernet networking from the OSI model, with emphasis on the PHY up to the data link level.
• Familiarity with forward error correction, PCS framing, PMA/PMD, PRBS, and other PHY traffic schemes.
• Understanding of signal processing: histograms, BER, SNR, sampling phase, Shannon limit, impulse & frequency response, FFT.
• Education: BS/MS/PhD degree in Computer Science, Electrical/Software Engineering, or related technical field(s).

Nice to Have

• Experience with SERDES, IM-DD/Coherent DSP, Ethernet/PCIe PHYs, and/or Optical Module SW.
• Familiarity with lab equipment and real hardware debugging in a lab setting.

Compensation & Benefits

• Base pay range: USD 154,680 - 231,700 per year.
• The successful candidate’s starting base pay will be determined based on job-related skills, experience, and qualifications.