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Senior Out-of-Order CPU Architect

Intel
Austin, Texas, United States
On-siteUSD 190,610 - 361,480 / year

About this role

About the Role As a CPU Architect at Intel, you will shape end-to-end CPU architectures for high-performance computing and low-power products. You will drive architecture specifications, define targets for performance, power, and area, and influence cross-functional roadmaps to deliver scalable and interoperable CPUs across markets. What You'll Do

  • Develop and drive end-to-end CPU architecture specifications based on hardware features, requirements, and lifecycle needs.
  • Define CPU targets for performance, power, frequency, area, and feature content to align with market requirements.
  • Explore novel architectures for multiple segments, from HPC to extreme low-power applications.
  • Invent, conceptualize, and specify architectural and microarchitectural features addressing future CPU usage.
  • Define and document new instructions to support innovative use cases and improve the ISA.
  • Develop and execute test plans, simulate functional models, and analyze results using advanced statistics.
  • Propose experimental changes and design alternatives to meet constraints for performance, power, area, and timing.
  • Capable of implementing microarchitectural specifications in SystemVerilog when needed to converge timing/power; otherwise collaborate with designers.
  • Review and influence cross-functional roadmaps with architects, design, verification, and validation engineers.
  • Drive the definition of new microarchitectures and mitigations for issues during feature implementation.
  • Leverage expertise in CPU architecture fundamentals, microarchitecture, RTL, and SystemVerilog to debug and resolve design problems. What We're Looking For
  • Minimum Qualifications: 15+ consecutive years in high performance/high frequency ARM or x86 CPU organizations in design or architectural roles; ideally both.
  • 10+ years in out-of-order sections of the CPU pipeline (wide instruction rename and allocation, uop/instruction schedulers, execution units).
  • 5+ years writing RTL and owning it through timing and power convergence across multiple CPU generations.
  • 2+ years building deep, high-frequency advanced integer and/or floating-point/vector schedulers.
  • Strong analytical and problem-solving skills; leadership or team management experience.
  • Effective collaboration to influence cross-functional roadmaps and drive innovation. Nice to Have
  • Passion for driving innovation and contributing to Intel's mission of delivering world-class technology solutions. Compensation & Benefits
  • Annual Salary Range: $190,610 - $361,480 USD.
  • Benefits include health, retirement, and vacation as part of the total compensation package.
  • This role is an Experienced Hire; location: Austin, TX.

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