Senior Manager - Systems Validation
About this role
Senior Manager - Systems Validation
locations
India - Hyderabad
time type
Full time
posted on
Posted Today
job requisition id
R1614-26
Job Description: The role will lead a technical validation team responsible for bring-up, validation, debug, and sign-off of FPGA silicon features and interfaces. This role requires strong hands-on silicon validation expertise, the ability to guide complex debug activities, and experience driving cross-functional execution across design, applications, systems, firmware, and global engineering teams.
The position involves creating and using validation designs partitioned across RTL and embedded processor applications, testing silicon on boards using lab equipment and protocol analyzers, reviewing specifications and validation plans, and ensuring issues are root-caused, tracked, resolved, and closed before sign-off.
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