Senior Engineer, Process Engineering

Job title: Senior Engineer, Process Engineering

About the Role The Senior Engineer, Process Engineering will join ASM's Global R&D Process Engineering Program to develop next-generation semiconductor technologies. The first 18–24 months are a structured development program with hands-on work; after which you relocate to an ASM R&D center in Japan, Korea, or the United States for a permanent role.

What You'll Do

• Work with semiconductor processing equipment to research, develop and optimize unit processes focused on the deposition of metal and dielectric films via ALD, PEALD, Epitaxy, and/or PECVD
• Develop innovative ideas and stay abreast of state-of-the-art processing applications
• Provide process consulting, write technical papers on advanced process applications and contribute to IP creation
• Participate in technical problem-solving sessions using the scientific method and industry tools such as Ishikawa diagrams
• Design and conduct experiments, measuring and interpreting outputs using DOE and RSM
• Troubleshoot equipment problems with hands-on problem solving
• Work with customers and central marketing to define requirements for successful customer demonstrations
• Develop methods for integrating metal and/or oxide films into existing and future device technologies
• Ensure successful product transfer to customers by performing demonstrations, traveling up to 10%, and documenting process development, tool operation and maintenance
• Produce technical papers on process, equipment, and device integration improvement strategies and present to professional audiences

What We're Looking For

• PhD in Chemical Engineering, Materials Science, Electrical Engineering, or Physics
• 0–7+ years of combined education, research, and work experience with deposition (ALD, CVD, Epitaxy, PECVD) and/or other thin-film deposition
• Materials characterization techniques such as XPS, SIMS, RBS, AFM, XRR, XRD, TEM, SEM and ellipsometry
• Knowledge of electrical characterization techniques for CMOS devices
• Application of dielectric and/or metal films for logic and memory structures
• Training in CFD (theoretical or practical) is preferred
• Demonstrated ability to independently manage complex process development projects
• Strong communication skills, with ability to document and present technical information clearly
• Understanding of hardware-design interplay with process outputs and integration of metals as work-function materials and barrier layers in FEOL/BEOL flows
• Experience with DOE/RSM for deposition processes and characterization techniques (XPS, SIMS, RBS, AFM, XRD, TEM, FESEM, Auger, Raman, ellipsometry)

Nice to Have

• CFD knowledge is preferred; electrical characterization for CMOS devices is preferred
• Additional experience with wide range of materials characterization techniques (XPS, SIMS, RBS, AFM, XRD, TEM, FESEM, Auger, Raman, ellipsometry)

Compensation & Benefits

• Training program with relocation prospects to global R&D centers; travel up to 10% is required
• Location flexibility across Leuven/Helsinki initially, with permanent placement in Tokyo, Phoenix, or Dongtan after program