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Senior CPU Performance Architect

Intel
US, Texas, Austin; US, Oregon, Hillsboro; US, California, Folsom; US, California, Santa Clara; US, Arizona, Phoenix
On-siteUSD 190,610 - 361,480 / year

About this role

About the Role As a CPU Performance Architect, you will play a pivotal role in shaping the future of Intel's cutting-edge CPU designs, driving innovation across high-performance computing and extreme low-power products. This position offers the unique opportunity to be at the forefront of technological advancements, defining and delivering architecture specifications that directly impact Intel's success and industry leadership. What You'll Do

  • Develops and drives end-to-end CPU microarchitecture specifications for highly optimized, modular, and scalable CPU based on hardware features, requirements, and interoperability of hardware and software throughout the product life cycle.
  • Evaluates feasibility tradeoffs, explores, and defines new approaches and novel microarchitectures for CPU.
  • Models CPU performance and power characteristics and analyzes the bottlenecks of current performance features on workloads that reflect CPU future usage.
  • Collaborates with architects, design, verification, and validation engineers during the execution of the project.
  • Delivers definition of new microarchitecture and finds mitigations for issues that arise during feature implementation to improve the overall design of CPU and overcome bottlenecks and constraints.
  • Participates in the debug and fixing of performance miscorrelation between RTL and/or silicon results against the performance model.
  • Candidate must have experience in designing high performance CPUs and should be an expert in at-least one or multiple domains across the CPU (Branch Prediction, Fetch/Decode, Rename/Allocation, Reservation Stations/Execution, Memory Subsystem or Prefetchers and its interactions with Uncore).
  • Experience in debugging microarchitecture and simulation issues.
  • Strong background in microarchitecture/RTL/logic development.
  • Proven ability to resolve complex problems, applying analytical and technical skills effectively. What We're Looking For
  • Master’s Degree with at least 10+ years of experience or a PhD (with dissertation within a general CPU performance domain) with 6+ years of experience working within a high performance, high frequency ARM or x86 CPU performance team.
  • At least 8+ years of continuous work within cycle accurate C++ CPU performance simulators.
  • Preferred: Background in CPU microarchitecture and experience modeling features in a cycle accurate performance simulator.
  • Experience in microarchitecture exploration and identifying new features which provide IPC across the CPU.
  • Experience with CPU performance related activities from inception to real silicon (pathfinding, definition, correlation with RTL and Post-Si performance debug and tuning).
  • Experience with performance scenarios/use cases and KPI/workloads.
  • Advanced skills with Object Oriented Programming (C++/STL) and scripting languages.
  • Ability to write assembly and craft tests to evaluate and debug microarchitectural features.
  • Ability to read/debug performance issues in RTL.
  • Join Intel and become part of a team dedicated to transforming computing architecture for a smarter, faster, and more connected world. Nice to Have
  • Background in CPU microarchitecture exploration and identifying new features which provide IPC across the CPU (additional emphasis on modeling and simulation).
  • Experience with performance modeling in cycle-accurate simulators and End-to-End path from inception to silicon.
  • Experience with performance scenarios, KPIs, and workloads in real-world deployments. Compensation & Benefits
  • We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
  • Annual Salary Range for jobs which could be performed in the US: $190,610.00-361,480.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations.

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