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Senior Analog Design Engineer

Intel
Phoenix, AZ; Hillsboro, OR

About this role

Job title: Senior Analog Design Engineer

About the Role The Hard IP and Test Chip Development team within Intel's Central Engineering Group is responsible for delivering industry-defining analog and mixed-signal IP for Intel's Client, Datacenter, AI, and Foundry customers. The IO team focuses on high-speed serial IO and die-to-die interfaces across multiple advanced process nodes. We are seeking an experienced Senior Analog Design Engineer to design, develop, and optimize analog and mixed-signal ICs for these programs.

What You'll Do

  • Design, develop, and optimize analog and mixed-signal ICs for Intel's client, data center, AI, and foundry customers.
  • Contribute to high-speed serial IO and die-to-die interface IP across multiple process nodes.
  • Collaborate with cross-functional teams on specification, verification, and tape-out processes.

What We're Looking For

  • Experience in analog and mixed-signal IC design and IP development.
  • Knowledge of high-speed IO and die-to-die interfaces across multiple process nodes.
  • Ability to collaborate with cross-functional teams and deliver robust ICs for a variety of Intel products.

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