Principal FPGA / RTL Design Engineer - Signal Processing

About the Role Silvus Technologies, a leading provider of advanced MANET and MIMO communications systems and a wholly owned subsidiary of Motorola Solutions, seeks a Principal FPGA / RTL Design Engineer. The role will participate in all aspects of the R&D process—from concept to field deployment—for efficient implementation of novel signal processing algorithms in Silvus' MIMO wireless networking products. The position is based in West Los Angeles, CA on a hybrid schedule with a minimum of three onsite days per week (Mondays, Wednesdays, and Thursdays). What You'll Do

• Digital design architecting for wireless communication projects.
• Fixed point design of signal processing blocks while working with systems engineers.
• RTL coding, simulation, and test bench development.
• FPGA synthesis and timing closure.
• Hardware verification and troubleshooting; familiarity with logic analyzers.
• Provide support to the RF and Software Engineering teams.
• Perform other related duties as assigned. What We're Looking For
• Bachelor of Science degree in Electrical Engineering, Computer Science, or related field.
• Minimum 10 years of demonstrated experience in RTL design and FPGA implementation; OR 8 years of RTL design and FPGA implementation experience with a Master of Science degree; OR 6 years of RTL design and FPGA implementation experience with a PhD degree.
• Demonstrated experience with fixed point binary arithmetic and digital signal processing designs.
• Proven expertise working with multiple clock-domain, high-utilization FPGA designs.
• Experience with Xilinx FPGAs, SoCs, and the Vivado IDE.
• Must be a U.S. Person (U.S. Citizen, or Permanent Resident) due to clients under U.S. federal contracts.
• All employment is contingent upon the successful clearance of a background check and drug test. Nice to Have
• M.S. or Ph.D. degree in Electrical Engineering, Computer Science, or relevant field.
• Basic MATLAB skills.
• Solid knowledge and understanding of scripting languages such as Perl and Python.
• Experience with wireless communication systems on FPGA or ASIC designs.
• Strong communication and presentation skills. Compensation & Benefits
• Compensation: $175,000 - $225,000 / annually.
• Incentive Bonus Plans; Medical, Dental, Vision benefits; 401K with Company Match; 10 Paid Holidays.
• Generous benefits package as part of U.S. benefits.