About this role
Principal Engineer - Verification
KeenSemi
Job description
About the role
Role: Own full-chip SoC verification, or several verification projects running in parallel, for a customer account. Provide technical leadership to 6–10 engineers through sub-leads, define methodology used across projects, and act as the verification sign-off authority.
Experience: 10 to 11 years. Must have 3 or more tapeouts, with at least 1 full-chip SoC tapeout, and technical leadership of teams of 6 or more engineers.
Desired Skills:
- Owns full-chip SoC verification from test plan to sign-off, covering boot flows, interconnect, memory subsystems and coherency, interrupts, and clock and reset sequencing.
- Defines reusable verification methodology and infrastructure across projects: testbench templates, VIP strategy, regression and coverage flows.
- Decides how work is split across simulation, formal, emulation and FPGA prototyping, and coordinates with those teams.
- Holds sign-off authority: defines and enforces sign-off criteria for functional, code and toggle coverage, assertions and GLS.
- Leads technical discussions with customers and handles technical escalations.
- Contributes effort estimation and scope definition to pre-sales and SOW discussions.
- Supports post-silicon debug by reproducing silicon issues in pre-silicon environments.
- Mentors leads and engineers, builds training content, and leads technical interviews.
- Drives productivity improvements through automation, regression optimization and AI-assisted verification flows.
Must-have skills
SoC verificationverification methodologytestbench
KeenSemi hiring for Principal Engineer - Verification