Principal Engineer, Design Verification
About this role
Job title: Principal Engineer, Design Verification
About the Role Marvell's Data Centre Engineering Group seeks a Principal Engineer in Design Verification to architect and implement verification environments for high-performance data centre silicon. The role focuses on IP verification for custom silicon, ensuring correctness, performance, and coverage.
What You'll Do
- Architect and implement simulation test benches in UVM.
- Develop and execute test plans to verify correctness and performance of the design.
- Own and debug simulation failures to root cause problems.
- Collaborate closely with logic designers for test plan development, execution, debugging, coverage closure, and gate-level simulations.
What We're Looking For
- Bachelor's degree in CS/EE with 13+ years or Master's degree with 11+ years relevant experience.
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