About this role
Job title: Principal Engineer, Advanced Packaging Technology
About the Role Marvell is seeking a Principal Engineer in Advanced Packaging Technology to lead the development of packaging solutions for AI/XPU/2.5D and 3D packaging. You will drive technology roadmaps, create innovative concepts, and collaborate with silicon design teams and external OSATs/foundries to deliver high-performance, reliable packaging solutions.
What You'll Do
- Develop packaging technology roadmap for AI XPU, XPU-attach and Switch
- Explore technologies beyond what is currently available, make recommendations, and create and protect IP to maximize performance
- Create new package technology concepts from open ended ideas, perform routing feasibility, signal and power integrity studies for design optimization
- Explore technology feasibility and create proof-of-concept samples and productize technologies
- Define package architecture including chiplet topology, interposer/substrate scaling, power delivery network strategy, and thermal design envelope
- Lead co-design efforts across silicon design, floorplanning, PDN modeling, and mechanical/thermal reliability
- Lead package material selection, substrate stack-up definition, mechanical modeling, and reliability analysis
- Partner with silicon design teams to co-optimize die floorplan, bump map, TSV, and RDL requirements
- Work with OSATs / Foundry partners to evaluate process capability, manufacturability, yield, and cost
- Drive package qualification and reliability validation to volume readiness
What We're Looking For
- Experience in advanced package and substrate technologies with deep understanding of process and materials, component and board level reliability, warpage and thermal management
- Experience in managing substrate and assembly material vendors, substrate manufacturers, OSATs and foundries
- Deep knowledge of Electrical Engineering concepts, circuit extractions and simulation, as well as design methodology and strategies
- Experience in signal and power integrity simulations, analysis and optimization for 2.5D and 3D packages including interface with memory, interposer, substrates and PCBs
- Ability to determine optimal signal routing, power delivery verification and package size determination
- Bachelor’s degree or a master’s degree in mechanical engineering, material science or related fields and 8-10 years of related professional experience, or PhD degree / post-doc with 5+ years of experience
- Experience interfacing with product design teams for optimized floor-planning, package related design input and power delivery network design
Nice to Have
- The ideal candidate would have: Prior experience in data center AI accelerators, networking silicon, or custom HPC silicon. Board, system and rack level integration, thermal, mechanical, signal and power analysis
- Ability to influence senior stakeholders across architecture, silicon design, system platform engineering, and supply chain
- Experience setting roadmaps, not just executing them
- Experience with silicon disaggregation and memory integration
- Demonstrated leadership driving cross-company supplier programs
- Experience with VNA and TDR measurements for package and PCB