Principal Analog Design Engineer

Job title: Principal Analog Design Engineer

About the Role Principal Analog IC Designer will be part of Marvell's central engineering team designing highly sophisticated CMOS LR SERDES, D2D and common Analog IPs. This role spans architectural investigations and implementation for circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, CDRs, etc., to meet key performance targets and performing design verification using industry standard tools such as SPICE, Spectre, MATLAB, etc. In this role, the successful candidate will lead a team of analog design engineers, interface with layout, verification, and application teams and manage delivery of analog IP to successfully bring designs from concept to production.

What You'll Do

• Lead a team of analog design engineers, interfacing with layout, verification, and application teams to deliver analog IP from concept to production.
• Design architectures and implement circuits such as PLL, DLL, ADCs, regulators, amplifiers, TX/RX, CDRs to meet performance targets; perform verification using SPICE, Spectre, MATLAB, etc.
• Collaborate with cross-functional teams across Central Engineering and other groups to ensure timely delivery and producibility of analog IP.
• Mentor and develop junior engineers; drive design reviews and maintain high quality standards throughout the project lifecycle.

What We're Looking For

• Master’s degree and/or PhD in Electrical Engineering or related field with 14+ years of experience.
• Experience in D2D IP, PLL, Data Converters, Oscillators and high-speed SerDes design including Receiver and Transmitter design.
• Experience with Single-ended High Density Parallel Interface for Chip-to-Chip Communication, UCIe, DDR5/LPDDR5; GDDR6/LPDDR6, HBM a plus.
• Experience with analog design and verification tools (Virtuoso, Spectre, ADE and post-layout extraction tools).
• Knowledge of the fundamentals on signal integrity improvement, noise reduction and Multi-GHz low-jitter clock generation & distribution.
• Good understanding of analog layouts in FinFET and its effect on high-speed designs.
• Experienced in system level pre-tape out analog validation; experienced in lab chip bring-up and debugging efforts.
• Strong communication skills.

Nice to Have

• Experience with HBM, memory interfaces (DDR memories) and related protocols.
• Leadership or mentoring experience and ability to drive cross-functional teams.

Compensation & Benefits With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.