About this role
NVIDIA is seeking a Verification Engineer to join the Memory Subsystem team in Bengaluru, India. This role focuses on verifying powerful memory subsystem IPs used in graphics processors, contributing to a range of products from data centers to consumer graphics and AI platforms. You will be part of a global team dedicated to pushing the boundaries of what is possible and shaping the future of computing.
Responsibilities
- Verify the design, architecture, and micro-architecture using sophisticated verification methodologies.
- Develop verification infrastructure components for complex IPs, including functional models, scoreboards, and new verification environments, using UVM.
- Define the verification scope, develop test plans, and drive functional coverage-driven verification closure.
- Collaborate with architects, designers, software engineers, and post-silicon teams across sites to deliver innovative and timely solutions.
Requirements
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BS or MS in Electrical Engineering or Electronics and Communications Engineering with 2+ years of experience.
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Experience in verification closure for complex IP or sub-systems on at least one project.
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Expertise in industry-standard verification flows such as SystemVerilog random testing, UVM, FV, coverage metrics, profiling tools, and X-propagation.
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Strong coding skills in SystemVerilog.
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Passion for debugging and strong problem-solving abilities.
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Excellent communication and interpersonal skills.
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Ways to stand out
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Prior verification experience related to memory subsystem or network interconnect IPs is highly desirable.
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Familiarity with memory subsystem concepts such as cache coherency, memory consistency models, arbitration policies, high-speed I/O protocols, and on-chip interconnects.
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Familiarity with scripting languages such as Perl or Python.