Member of Technical Staff, AI-Driven Compilation

Member of Technical Staff, AI-Driven Compilation

About the job

At SF Tensor, we're building the future of high-performance compute. We firmly believe that the future of AI depends on the unglamorous: rethinking and rebuilding the stack, all the way down. From the hardware underneath it to the compiler targeting it and the cloud running it. Right now those three things fight each other and that friction shows up as a tax on every researcher trying to build something ambitious. We're here to axe that tax and make compute faster, cheaper and more available. When we succeed, compute will be portable enough that which cloud, which chip stop being something you worry about.

To achieve this, we are building our Kernel Optimizer, which takes code and finds its fastest possible form for whatever vendor and cluster topology you point it at, automatically, as well as the Model Foundry which manages the runs, makes research easier and moves workloads across clouds and chips as prices and availability ship, instead of leaving you locked into whatever vendor you signed with first.

We're backed by Susa Ventures, Y Combinator, along with some great funds and angels including Max Mullen and Paul Graham, as well as founders and executives at Neuralink, Notion and AMD. We're looking for researchers, engineers and organizations who agree with the basic premise: you don't get the next leap in AI without a leap in compute first.

What You'll Do

• Design and implement RL systems that search over a massive program space: instruction selection, schedules, tile sizes, fusion strategies and phase ordering

• Build agentic compilation loops that use LLMs to reason about IR, propose transformations and learn from measured results

• Design the search and credit-assignment machinery around an exact reward built from measured latency on real hardware and a formal correctness proof

• Create representations and embeddings of compiler IR that hold up under learned optimization

• Build the training infrastructure for compiler optimization agents, including rollout throughput and distributed evaluation on real silicon

• Push transfer and cold-start performance so that the search works on unfamiliar targets and new ISAs from the first trial

• Close the loop with production workloads so that the compiler keeps improving from what customers actually run

• Work directly with our compiler and kernel engineers to land learned components in the shipping pipeline

• Run rigorous experiments, dig into the results, iterate on them and publish or open-source some of them

• What We're Looking For

• Strong background in reinforcement learning with hands-on experience training agents

• Experience building LLM agents, tool use and other agentic systems

• Familiarity in GPU programming concepts and a willingness to get down to the ISA

• Proficiency in PyTorch or JAX

• Ability to design and run experiments that produce trustworthy results

• Nice to Have

• Experience in ML compiler stacks (XLA, TVM, Triton, MLIR) or LLVM backends

• Background in program synthesis, superoptimization, combinatorial search, formal methods, SMT solvers or verified compilation

• Familiarity with RLHF, reward modeling or preference learning

• Research contributions in RL or learned optimization

• Familiarity with GPU performance optimization, profiling and microbenchmarking

• Why Join Us

• Compiler optimization is the rare place where a learned system gets an enormous action space and a ground-truth reward at the same time. What usually blocks this work is everything around it (a background that can't execute what the search finds or no way to trust the result). You get both here: direct cubin emission below ptxas and a prover that tells you whether the program is correct. In this role, you'll have the tools and researches to let your most ambitious research ideas run wild and if they find valid kernels, ship them into production in days rather than becoming a paper and then nothing.

• We're a small team operating at frontier scale. We pre-trained foundation models on 4,000 AMD GPUs as a team of three, designed and brought up GB300 NVL72 clusters and designed a TOP500 supercomputer.

• We believe that hard problems get solved in person and most of our work happens at our office in San Francisco. We offer relocation assistance and, where possible, we'd like you here as often as possible.

• The base salary range for this full-time position is 275,000-315,000, plus meaningful equity and benefits.

About the company

San Francisco Tensor Company

Actively Hiring

Train models on any hardware1-10 Employees

San Francisco

1-10

Startup

Artificial Intelligence

• Growing fast

Showed strong hiring growth in the past month

Learn more about San Francisco Tensor Company

Founders

Ben Koska Founder

View the team

Similar Jobs