About this role
Job title: Layout Design Engineer
About the Role Synopsys seeks a Layout Design Engineer specializing in analog and mixed-signal CMOS circuit layout to contribute to high-performance silicon chips and software content. You will work on developing layouts for high-speed SerDes interfaces and supporting analog blocks, with a focus on portability across multiple foundry nodes.
What You'll Do
- Designing and implementing complex analog and mixed-signal CMOS circuit layouts, with a focus on high-speed SerDes interfaces and supporting analog blocks.
- Contributing to layout quality validation and reliability improvements across deep submicron technologies.
What We're Looking For
- Passionate and detail-oriented Layout Design Engineer with a strong foundation in analog and mixed-signal CMOS circuit layout.
- Experience with transistor-level design, deep submicron CMOS technologies, and understanding of layout effects and reliability.
- Proficiency in floor planning, layout entry, and quality validation.
- Ability to design for portability across multiple foundry nodes.
- Familiarity with signal integrity challenges, ESD and latch-up mitigation.
- Collaborative, fast-paced team player eager to work in a global context.