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IP Release Principal Engineer

Marvell
Santa Clara, CA; Irvine, CA
On-site

About this role

Job title: IP Release Principal Engineer

What We're Looking For

  • Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 10-15 years of related professional experience or Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 5-10 years of experience or equivalent professional experience in lieu of a formal degree.
  • Domain Expertise of SoC architecture, processor cores, memory, PCIe/CXL highly preferred.
  • Ethernet, Security and peripheral interfaces through hands on prior experience preferred.
  • Experience with Large and complex design synthesis, Floor planning, Place and Route, Clock tree and Timing closure of large Subsystems.
  • Extensive experience in Verilog and Static Quality checks of the implemented RTL.
  • Experience with Memory generation highly preferred.
  • Experience with leading foundries and latest process nodes 2nm, 3nm, 5nm etc preferred.
  • Hands on experience in interpretive language such as Perl/Python.
  • Proven track record of delivering high-quality IP subsystems on time.

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