About this role
About the Role Marvell seeks a Senior Staff Engineer to lead post-silicon validation, characterization, and debugging of high‑speed Ethernet and PHY IPs, ensuring performance, reliability, and interoperability across data center ASICs/SoCs, working from silicon bring‑up to system‑level qualification. What You'll Do
- Lead post-silicon validation, characterization, and debug of high‑speed Ethernet and PHY interface IPs, ensuring performance, reliability, and interoperability.
- Perform Ethernet protocol compliance and standards validation per IEEE 802.3 and IEEE 802.1Q, including VLAN, ARP, STP, DHCP, DNS, TCP/IP, OSPF, and BGP, at Layer 2 and Layer 3.
- Execute Ethernet interoperability testing with switches, SFP/QSFP modules, DACs, and optical transceivers.
- Design, develop, and maintain Python‑based automation frameworks to support functional, regression, and manufacturing tests, reducing manual effort.
- Configure, maintain, and scale lab environments to support software validation, networking feature testing, and system‑level stress testing.
- Integrate automated test execution into CI/CD pipelines using Jenkins; analyze test failures and perform root‑cause analysis. What We're Looking For
- Proven experience in hardware validation, post-silicon validation, and debugging of high‑speed Ethernet PHY IPs.
- Strong knowledge of Ethernet standards (IEEE 802.3, IEEE 802.1Q) and Layer 2/3 features (VLAN, ARP, STP, DHCP, DNS, TCP/IP, OSPF, BGP).
- Experience with Ethernet interoperability testing across switches, SFP/QSFP modules, DACs, and transceivers.
- Proficiency in Python and automation framework development to support functional, regression, and manufacturing tests.
- Experience configuring and maintaining lab environments for software validation and system-level stress testing.
- Familiarity with CI/CD, Jenkins, test automation, and root-cause analysis of failures.