Digital Design Engineer

Job title: Digital Design Engineer

An experienced digital design engineer will work on Skyworks' next-generation wireless audio ASICs. You will architect, design, and collaborate on radio subsystems in small-geometry mixed-signal CMOS SoCs, contributing to digital architecture, RTL design, emulation, modeling, silicon testing, and debugging. You will partner with analog, RF, firmware, and test teams to meet stringent performance, power, and functional requirements while applying low-power design techniques.

What You'll Do

• Architect, design, and collaborate on radio subsystems in small-geometry mixed-signal CMOS SoCs.
• Lead full chip/block-level architecture, RTL design and implementation; emulate, model, simulate, and debug digital circuits and SoCs.
• Provide technical leadership and expertise across digital design and implementation.
• Work closely with analog, RF, firmware, test and evaluation teams to ensure requirements are met.
• Apply expertise in low-power SOC design, signal processing, processor cores, and ASIC implementation.

What We're Looking For

• 5+ years (BSEE), 3+ years (MSEE), or 0+ years (PhD) of relevant industry experience.
• Proven experience in Verilog and SystemVerilog.
• Experience authoring specifications.
• Architectural modeling experience in Matlab, Python, or C.
• Experience in Real-time data processing systems.
• Understanding of ASIC design flow (RTL design, verification, synthesis, timing analysis, power analysis, physical design, test).
• Familiarity with wireless communication and modulation schemes (pi/4 DQPSK, 16QAM, GFSK).
• Implementation of FIR/IIR filters and compensation for impairments (Carrier Frequency Offset, Symbol Timing Recovery, Channel Equalization).
• ASIC prototyping using FPGA.
• Embedded firmware development using C (for testcase development and firmware debug).
• Lab evaluation using oscilloscopes, logic analyzers, spectrum analyzers.
• Familiarity with Audio performance measurements (SNR, THD, SINAD, DR).
• Familiarity with external interfaces (SPI, I2C, I2S, UART, JTAG).
• Familiarity with ARM and/or RISC-V processors.
• Familiarity interfacing to standard bus protocols (AHB, APB, AXI); Direct Memory Access controllers.
• Clock Domain Crossing techniques; Low power design techniques; Design For Test concepts.
• Skilled in scripting languages such as Python, Perl, TCL, Makefiles, and shell scripts.

Nice to Have

• ASIC prototyping and hardware-software integration experience beyond core requirements.
• Deeper DSP/AI-focused audio processing knowledge or advanced wireless algorithms.
• Additional experience with FPGA-based test benches and automated measurement setups.

Compensation & Benefits

• Base pay range: USD 91,200 - 177,200 per year.
• Benefits include healthcare benefits (premium-free medical plan option), a 401(k) plan with company match, an employee stock purchase plan, paid time off (vacation, sick/wellness, parental leave), among others.
• Employees are eligible to participate in an incentive plan, and certain roles are eligible for additional awards, including recognition and stock.