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Design Verification Senior Staff Engineer

Marvell
Hyderabad, Telangana, India
On-site

About this role

About the Role

Marvell is seeking a Design Verification Senior Staff Engineer to lead end-to-end DV for SoCs in the Compute & Storage (CCS) BU. You will drive DV processes, collaborate with IP/Subsystem/SoC teams, and support post-silicon validation to ensure high-quality silicon.

What You'll Do

  • Lead End-to-End SoC DV execution and sign-off.
  • Define and drive improvements in DV processes for efficient and high-quality execution.
  • Collaborate with IP, Subsystem, and SoC teams on test plan creation, testbench architecture, and milestone reviews.
  • Work closely with Design and DV teams across IP, Subsystem, and SoC levels for test plan development, execution, debug, coverage closure, and gate-level simulations.
  • Coordinate with cross-functional teams including Architecture, Chip Lead, Emulation, and Program Management to drive SoC-level DV execution.
  • Partner with Silicon bring-up and Firmware teams to support post-silicon validation and bring-up activities.
  • Own and debug simulation failures to identify and resolve root causes.
  • Architect and implement simulation testbenches using UVM & C.
  • Develop and execute test plans to verify design correctness and performance.
  • Collaborate with logic designers for thorough verification coverage and closure.

What We're Looking For

  • Bachelor’s degree in CS/EE or Master degree in CS/EE with 8+ years of relevant experience.
  • Experience in Leading core technical leads.
  • Must have experience in SOC/Subsys/IP level verification of ARM-based SOC and experience in ARM boot sequences.
  • Knowledge of ARM architecture and AMBA bus standards like AXI-4, CHI and ACE.
  • Experience with industry standard interfaces such as DDR, HBM, PCIE, Ethernet and USB.
  • Experience coding UVM SOC/Subsys/block level testbenches, BFM, scoreboards, monitors, etc.
  • Proficient in writing and debugging tests in UVM as well as C.
  • Exposure to Cadence, Synopsys, Mentor and/or ARM verification tools.
  • Experience with assertion-based formal verification tools.
  • Proficient in programming in scripting languages such as Tcl and Perl.
  • Understanding of hardware emulation support.
  • Familiarity with TLMs in SystemC.
  • Experience in Version tools like CVS, SVN, GIT etc.

Compensation & Benefits

  • With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity.
  • For additional information on what it’s like to work at Marvell, visit our Careers page.

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