CAD Design Enablement TPM

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CAD Design Enablement TPM

Austin,Texas,United States

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Job description

Company and benefits

Job ID

793107

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About this opportunity:

Silicon CAD Technical Product Manager – Central Engineering, Strategy & Operations Ericsson Silicon

Austin, Texas

Role Overview Ericsson Silicon develops ASICs and FPGAs for Ericsson’s telecommunications portfolio. Central Engineering provides design methodologies, tools, and infrastructure that enable silicon development. Silicon CAD enables engineering teams through shared methodologies, EDA workflows and automation, collaborating across R&D sites in Austin, Sweden and India. The Strategy & Operations (StrOps) team supports organizational strategy, operational efficiency, financial stewardship, and execution excellence. As a member of the Strategy & Operations team, you will consolidate engineering needs into a prioritized portfolio of initiatives and translate them into executable plans aligned with ASIC project milestones.

What You Will Do: The program portfolio spans the following domains. You bring practical depth in at least one domain and sufficient breadth to coordinate specialists and manage dependencies across the wider development environment.

• Design and verification methodologies. RTL quality, lint, clock and reset domain crossing (CDC/RDC), constraints, simulation, formal verification, regression, debug and coverage.
• Implementation and signoff. Synthesis, physical implementation, timing, power, equivalence and signoff; front-end/back-end handoffs; early power, performance and area (PPA) estimation and RTL-to-signoff improvements.
• Automation and controlled delivery. CI/CD, reproducible workflows, automated quality gates, release traceability and agreed AI-enabled development improvements.
• Development environment. Compute, storage, access management, information security, trade compliance and support dependencies affecting engineering execution and deployment.

Key Responsibilities

• Consolidate needs and set priorities. Bring together requirements across IP and SoC teams. Agree priorities with CAD leadership and engineering stakeholders, balancing project impact, dependencies and available capacity.

• Align technical interfaces. Coordinate requirements, handoffs, rules, waivers and quality gates across design, verification, back-end, DFX and support teams. Drive timely decisions and escalate priority, resource and schedule conflicts with options and consequences.

• Lead integrated execution. Maintain one integrated roadmap and delivery plan for each agreed initiative, with defined scope, milestones, acceptance criteria and risks. Agree accountable engineering owners and resource commitments with responsible managers.

• Coordinate qualification and release readiness. Work with engineering specialists and EDA vendors on evaluations, representative pilots and qualification. Ensure required evidence and designated technical approvals are complete before release; align deployment with ASIC project needs.

• Coordinate environment and support improvements. Translate engineering needs into agreed actions with infrastructure, security, compliance and support owners. Establish clear support interfaces, release visibility and escalation paths without taking ownership of routine operational support.

• Deliver sustained adoption. Plan rollout, migration and recovery with responsible owners. Coordinate documentation, knowledge transfer and team readiness; track adoption and remove barriers. Drive reuse, standardization and simplification, feeding project learning into the roadmap.

• Maintain stakeholder and vendor alignment. Communicate progress, dependencies, risks and required decisions through relevant CAD and project governance forums. Coordinate technical vendor engagement with Sourcing and designated supplier owners.

• Join our Team

About this opportunity:

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• The role combines program leadership with technical alignment: setting clear scope, securing delivery commitments, resolving dependencies and coordinating qualification and adoption. Success means that agreed capabilities reach engineering teams at the right time and deliver measurable improvements in development quality, productivity and predictability.

What You Will Bring:

• A master’s degree in electrical engineering, computer engineering, computer science or a related technical field with 7+ years of relevant experience.
• A background in ASIC/SoC design, verification, Silicon CAD, physical implementation or related EDA engineering, with demonstrated delivery of cross-functional initiatives from requirements through qualification, release and adoption.
• An end-to-end understanding of RTL-t