About this role

Global Talent Simplified

Job descriptionApplication

Job responsibilities:

Verification of High speed IPs like PCIe and sub-system using Best-In-Class methodologies and Processes
Lead and Drive Deliverables for IP/SS Verification using SV/UVM based verification.
Planning and Strategizing Team Execution towards Efficient, Scalable IP/SS Verification Environment and Methodologies
Interact with Architecture and Design Team to establish standard flows and Deliverables alignments.
Understanding to Architecture requirements and support till end product QS
Work across a challenging schedule and maximize Teams efficiency using Automation, Portability and Reusability
Lead and drive Silicon Bring up.
Plan and ramp-up the team for enabling multiple IP/SS verification in parallel with High Quality and Efficiency

Job Qualifications

Bachelors/Masters in Engineering with Overall Verification domain experience of 14+ years
Minimum 12+ years of experience in IP/SS verification using SV and UVM
An expert level experience on PCIe protocols (Root-Complex, Endpoints and SR-IOV)
Minimum 3+ years of Experience in managing teams of 10+ engineers and Leads Management
Good experience in collaborating with engineering teams across multiple Geographies.
Good understanding on Storage controller Architectures, Processor Architecture and SOC verification methodologies
Knowledge of industry standard interfaces, such as PCIE-NVME, NAND and AXI is an advantage.
Ability to Improvise methodologies and drive Automation towards efficient Execution.
Good Experience in Career planning, Technical mentoring and Coaching junior Engineers

Must-have skills

PCIeUniversal Verification Methodology - UVMVerification

Good-to-have skills

IP Verification

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