ASIC Architect

Job title: ASIC Architect

About the Role The ASIC Security Architect is a senior technical leader responsible for end-to-end hardware architecture across Marvell’s SoCs, guiding the evolution of security-centric capabilities from concept to product lifecycle. You will collaborate with marketing, business development, and cross-functional engineering teams to define impactful use cases and architect features for data center switch ASICs and related intra/inter-rack components.

What You'll Do

• Provide architecture leadership across Design, Verification, Physical Design, Systems, and Software throughout the full lifecycle of SoC products.
• Collaborate to identify customer value and use cases; drive Soft/Hardware co-design discussions.
• Conduct detailed performance analyses and evaluate power-performance-area trade-offs; apply performance modeling where appropriate.
• Apply domain expertise in Platform Security, Silicon Root-of-Trust, Trusted Computing, Embedded CPU Subsystems, and Data Network Switching.
• Author architecture specifications and robust validation plans; file patent applications for novel technologies.
• Engage in industry workgroups (TCG, OCP, DMTF, Caliptra, PCI-SIG, CXL, UALink, etc.).
• Guide design and verification teams to implement ASIC architectures and ensure thorough documentation and pseudocode.

What We're Looking For

• 15+ years of experience with a Master’s in Electrical/Computer Engineering or 10+ years with a PhD.
• Exceptional written and verbal communication; ability to articulate complex architectures in technical documents and presentations.
• Creative problem solving and a track record of delivering robust ASIC product architectures.
• Strong experience delivering architecture documentation, pseudocode, and guiding multi-disciplinary teams.
• Solid working knowledge of ASIC security (root-of-trust, TEE, data encryption, access control).
• Understanding of interconnect protocols (PCIe, CXL, UALink, Ethernet) and ARM CPU subsystem architecture (memory and cache subsystems).

Nice to Have

• Desirable experience with PCIe, CXL, UALink, and Ethernet interconnects.
• Extensive ARM CPU subsystem architecture experience, including memory and cache subsystems.

Compensation & Benefits

• Base pay range: USD 191,530 – 286,900 per year. Starting pay determined by skills, experience, location, and market conditions.
• Benefits include an employee stock purchase plan with a 2-year look back, family support programs, mental health resources, and recognition/service awards.
• We provide equal opportunity employment and accommodations during the selection process upon request.