About this role
Job title: Analog Modeling & Testing Engineer Intern
About the Role Marvell’s Central Engineering Team is seeking an analog mixed signal design intern to support the development of analog IP products at Córdoba design center. The successful candidate will be involved in supporting IC design through design and layout, silicon evaluation and characterization, and will work within a talented group to learn exciting new technologies and contribute to robust analog IC design.
What You'll Do
- Joint design team and take advanced analog training
- Training in modeling analog circuits in System Verilog
- Verify SV simulations vs SPICE simulations
- Learn testing of analog circuits using Python scripts and firmware
- Run co-simulation between digital and analog designs
- Develop and enhance flows that support and facilitate robust analog IC design
What We're Looking For
- Final year of a 5/5.5 year Engineering program at UTN-FRC/UTN-VM/UNC/IUA or Master/PhD in Electrical Engineering at any university in Argentina
- Intuitive and analytical understanding of transistor-level and CMOS circuit design
- Experience in Verilog and SPICE simulations
- Ability to define and adhere to project schedules
- Effective written and verbal communication skills
- Ability to write behavioral models for both analog and digital circuits is a plus
Nice to Have
- Experience in SystemVerilog modeling
- Behavioral modeling for analog/digital circuits is a plus
Compensation & Benefits
- Competitive compensation and great benefits
- Work environment based on collaboration, transparency, and inclusivity
- Tools and resources to succeed and grow with Marvell