About this role
Job title: Analog Engineer Intern - PhD
About the Role Marvell's Optical PHY (CE-OPHY) team is seeking an Analog Engineer Intern at the PhD level to contribute to high-speed transceiver design in data-center, metro, and long-haul networks. This internship provides hands-on exposure to analog/mixed-signal design within a collaborative environment focused on delivering cutting-edge chips and subsystems.
What You'll Do
- Support the analog design team in architectural exploration and circuit implementation for blocks such as PLLs, DLLs, ADCs, regulators, amplifiers, transmitters, receivers, and clock/data recovery circuits.
- Assist in design verification using tools like SPICE, Spectre, and MATLAB.
- Collaborate with layout, verification, and application teams to help deliver analog IP from concept to tape-out.
- Participate in lab bring-up and debugging activities under guidance from senior engineers.
- Document findings, contribute to design reviews, and learn best practices in analog/mixed-signal design.
What We're Looking For
- Currently pursuing a Master’s or PhD in Electrical Engineering or a related field.
- Coursework or project experience in analog/mixed-signal circuit design is preferred.
- Exposure to design concepts such as PLLs, ADCs, oscillators, and SerDes (TX/RX) is a plus.
- Familiarity with analog design tools such as Virtuoso, Spectre, and ADE is beneficial.
- Basic understanding of signal integrity, noise reduction, and clock generation techniques.
- Interest in learning about FinFET layout considerations and their impact on high-speed designs.
- Strong analytical and communication skills, with a collaborative mindset.
Compensation & Benefits
- Expected base pay range: CAD 36-48 per hour. With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity.
- For additional information on what it’s like to work at Marvell, visit our Careers page.