Senior SerDes Verification Engineer
About this role
About the Role As a SerDes Verification Engineer, you will be responsible for the verification and validation of high-speed SerDes interfaces, including testing data integrity, performance, and protocol compliance. You will work closely with hardware and design teams to ensure that SerDes designs meet the required specifications, operating parameters, and quality standards. What You'll Do
- Verify SerDes designs by developing and executing verification plans and testbenches for SerDes IPs and subsystems to ensure functional and performance requirements are met.
- Develop verification testbenches using industry-standard methodologies (UVM, SystemVerilog, VHDL) and perform simulations, debugging timing/protocol issues.
- Perform simulations, analyze results, and debug timing, protocol errors, and other design anomalies in SerDes blocks.
Read the full description on TalentApply
Create a free account to see the complete job description, how well your CV matches this role, and apply in one click.
AI rewrites and formats your CV so it reads well and gets past screeners.
Get your match percentage for this exact role before you spend time applying.
Send a polished application in one click — no retyping the same details.
Follow every application in one place instead of digging through your inbox.
Free account · No card required
Your next opportunity starts here
Prepare, apply, track, interview and get hired — all from one platform, with AI in your corner.